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White Papers > Wafer Processing

Copper deposition: challenges at 32nm

01 March 2006 | Edition 29, Wafer Processing
Dr P.H. Haumesser, Dr S. Maîtrejean & A. Roule, CEA-LETI, Grenoble, France, Dr G. Passemard, STMicroelectronics, Crolles Cedex, France Read more >>

Selective single-wafer wet etching of hf-based layers

01 December 2005 | Edition 28, Wafer Processing
H. Kraus, F. Kovacs, J. Snow, M. Claes, V. Paraschiv, R. Vos, P. W. Mertens, S. De Gendt, M. Heyns, L. Archer
SEZ AG, Draubodenweg 29, Villach Austria IMEC, Kapeldreef 75, Leuven, Belgium Read more >>

front end surface preparation challenges and solutions for 65- and 45-nm technology nodes

01 December 2005 | Edition 28, Wafer Processing
Jagdish Prasad, AMI Semiconductor, Pocatello, ID 83201, USA Read more >>

feol and beol applications of X-ray metrology

01 December 2005 | Edition 28, Wafer Processing | Comments (1)
C. Wyon1, J.P. Gonchond2, M. Hopstaken3, J. Bienacel2, R. Delsol3, P. Normandon2 and L.F.Tz. Kwakman3
1CEA-LETI, 2STMicroelectronics, 3Philips Semiconductors, 850, rue Jean Monnet, 38926 Crolles cedex, France
Read more >>

Dual work function metal gate cmos by means of full silicidation (fusi)

01 December 2005 | Edition 28, Wafer Processing | Comments (1)
Philippe Absil, Serge Biesemans, Jorge Kittl, Anne Lauwers Read more >>

advanced characterization for copper interconnect technology

01 December 2005 | Edition 28, Wafer Processing
Amal Chabli, CEA-Leti, Grenoble, France Read more >>

Seedless superfilling: Opportunities and challenges

01 August 2005 | Edition 27, Wafer Processing
Thomas P. Moffat & Daniel Josell, Materials Science and Engineering Laboratory, National Institute of Standards and Technology, Gaithersburg, MD, USA Read more >>

Barrier metal layers create growing requirement for advanced metrology

01 August 2005 | Edition 27, Wafer Processing
Dr. Paul Ryan, Dr. Matthew Wormington & Helen Parnell, Bede X-ray Metrology, UK Read more >>

Integration of ALD TaN barriers in porous low-k interconnect for the 45nm node and beyond; solution

01 June 2005 | Edition 26, Wafer Processing
W.F.A. Besling & M. Broekaart, Philips Semiconductors Crolles R&D, Crolles, France, V. Arnal, J.F. Guillaumond, A. Farcy & J. Torres, STMicroelectronics, Crolles, France, C. Guedj & L. Arnaud, CEA LETI, Grenoble, France Read more >>

Challenges and trends in copper plating technology for 90nm and beyond

01 June 2005 | Edition 26, Wafer Processing
Axel Preusse, AMD Fab 36 LLC & Co. KG & Markus Nopper, AMD Saxony LLC & Co. KG, Dresden, Germany Read more >>