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White Papers > Wafer Processing

Deep trench metrology challenges for 75nm DRAM technology

01 December 2006 | Edition 32, Wafer Processing
Peter Weidner, Alexander Kasic, Thomas Hingst & Thomas Lindner, Qimonda Dresden, Germany Read more >>

Critical dimension metrology with small angle x-ray scattering

01 December 2006 | Edition 32, Wafer Processing
Eric K. Lin, Wen-li Wu, Ronald L. Jones & Chengqing Wang, NIST, USA
Kwang-Woo Choi, George M. Thompson & Bryan J. Rice, Intel Corp., USA
Read more >>

Using polymer deposition to control contact hole distortion at ≤65nm

01 September 2006 | Edition 31, Wafer Processing
Judy Wang, Shing-Li Sung & Shawming Ma, Applied Materials, USA Read more >>

Post-etch residue and photoresist removal challenges for the 45 nm technology node and beyond

01 September 2006 | Edition 31, Wafer Processing
Paul W. Mertens, Guy Vereecke & Rita Vos, IMEC, Leuven, Belgium Read more >>

Dominance of silicon CMOS based semiconductor manufacturing beyond international technology roadmap

01 June 2006 | Edition 30, Wafer Processing
R. Singh, P. Chandran, M. Grujicic, K.F.Poole, U. Vingnani, S.R. Ganapathi, A. Swaminathan,
P. Jagannathan, & H. Iyer, Clemson University, South Carolina, USA Read more >>

Advanced junction fabrication challenges at the 45nm node

01 June 2006 | Edition 30, Wafer Processing
D. Lenoble, STMicroelectronics Read more >>

Substrate cleaning and drying for semiconductor manufacturing

01 March 2006 | Edition 29, Wafer Processing
D. Martin Knotter, Philips Semiconductors, Nijmegen, The Netherlands, & Jagdish Prasad, AMI Semiconductor, Pocatello, Idaho, USA Read more >>

Current issues in defect detection and review: bevel-edge inspection and in-line elemental analysis

01 March 2006 | Edition 29, Wafer Processing
Dilip Patel, Intel assignee, ISMI, USA, & Milton Godwin, ISMI, Austin, Texas, USA Read more >>

Copper deposition: challenges at 32nm

01 March 2006 | Edition 29, Wafer Processing
Dr P.H. Haumesser, Dr S. Maîtrejean & A. Roule, CEA-LETI, Grenoble, France, Dr G. Passemard, STMicroelectronics, Crolles Cedex, France Read more >>

Selective single-wafer wet etching of hf-based layers

01 December 2005 | Edition 28, Wafer Processing
H. Kraus, F. Kovacs, J. Snow, M. Claes, V. Paraschiv, R. Vos, P. W. Mertens, S. De Gendt, M. Heyns, L. Archer
SEZ AG, Draubodenweg 29, Villach Austria IMEC, Kapeldreef 75, Leuven, Belgium Read more >>