Online information source for semiconductor professionals

By Oguz Yavas, Ernst Richter, Christian Kluthe & Markus Sickmoeller, Qimonda AG - ABSTRACT - A recent collection of data on 90nm, 80nm and 75nm technology from state-of-the-art 300mm wafer fabs have been brought together to perform a comprehensive analysis of wafer-edge yield engineering. For this study, a dedicated cross-functional team thoroughly investigated wafer periphery using innovative tools such as yield test chips and advanced process inspection. Critical processes were identified and countermeasures implemented to improve overall yield performance. Best practice sharing within the fabrication cluster resulted in a significant learning speed that supported an aggressive global production ramp. The challenges and the methodology used to address fast wafer-edge yield learning in Dynamic Random Access Memory (DRAM) manufacturing are the focus of this paper.

Read more >>

By Ernst Richter et al - ABSTRACT - This article follows up on a previously published paper that introduced the 110nm technology transfer of Dynamic Random Access Memory (DRAM) for the Inotera Memories joint venture at start-up [1]. In this paper, technology transfer and ramp of the 75nm DRAM technology is outlined for Inotera in full production mode. Again, technology transfer was done from Qimonda (previously Infineon Technologies) at Dresden in Germany where the technology was jointly developed with Nanya Technologies. Inotera at Taoyuan in Taiwan was the first receiving site to repeat the technology qualification. Continuous sales price reduction puts pressure on memory firms for fast introduction of technology shrinks to remain cost competitive [2]. Delays as short as a few days in the production ramp can translate into millions of dollars of missed opportunity in revenue. This paper sets forth the steps taken by the two companies to avoid such setbacks in the technology transfer. Read more >>