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White Papers > Edition 28

front end surface preparation challenges and solutions for 65- and 45-nm technology nodes

01 December 2005 | Edition 28, Wafer Processing
Jagdish Prasad, AMI Semiconductor, Pocatello, ID 83201, USA Read more >>

feol and beol applications of X-ray metrology

01 December 2005 | Edition 28, Wafer Processing
C. Wyon1, J.P. Gonchond2, M. Hopstaken3, J. Bienacel2, R. Delsol3, P. Normandon2 and L.F.Tz. Kwakman3
1CEA-LETI, 2STMicroelectronics, 3Philips Semiconductors, 850, rue Jean Monnet, 38926 Crolles cedex, France
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Dual work function metal gate cmos by means of full silicidation (fusi)

01 December 2005 | Edition 28, Wafer Processing | Comments (1)
Philippe Absil, Serge Biesemans, Jorge Kittl, Anne Lauwers Read more >>

advanced characterization for copper interconnect technology

01 December 2005 | Edition 28, Wafer Processing
Amal Chabli, CEA-Leti, Grenoble, France Read more >>