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White Papers > Edition 23

A life-cycle cost (LCC) fab model ?? interaction between activities in IC manufacturing and their s

01 August 2004 | Edition 23, Cleanroom
A life-cycle cost (LCC) fab model – interaction between activities in IC manufacturing and their supporting facilities within a fab

N. Van Hoornick, K. Van den Broeck, J. Van Hoeymissen & M. Heyns, IMEC, Heverlee, Belgium, W. Riedel & C. Braun, M+W Zander, Stuttgart, Germany

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Probing the causes of corrosion in welded 316L stainless steel

Gerhard Schiroky & Gary Henrich, Swagelok Company, Solon, Ohio, USA Read more >>

The ESH impact of advanced lithography materials and processes

01 August 2004 | Edition 23, EHS
Walter F.Worth, International SEMATECH, Austin, Texas, USA Read more >>

Easing the transition to 300-mm wafer fabrication through automation

01 August 2004 | Edition 23, Fab Management
Thomas J. Sonderman, Advanced Micro Devices, Austin, TX, USA Read more >>

RETs: understanding the cost of complexity

01 August 2004 | Edition 23, Lithography
Mark E. Mason, Texas Instruments Incorporated, Dallas, Texas, USA Read more >>

Investigation of the fast removal of nano PSL and submicron silica and silicon nitride particles

01 August 2004 | Edition 23, Wafer Processing
John Michael Bernard, Oytun Guldkin & Ahmed Busnaina, NSF Center for Nano and Micro Contamination Control, Northeastern University, Boston, MA, USA Jingoo Park, Hanyang University, Ansan, Korea Read more >>

High-k/metal gate transistor scaling and device concerns for advanced CMOS device applications

01 August 2004 | Edition 23, Wafer Processing
Mark I. Gardnera, Sundar Gopalan, Jim Gutt, Paul Kirschb, Siddarth Kirshnan, Jeff Petersonc, Hong-Jyh Lid & Howard R. Huff, International SEMATECH, Austin, Texas, USA Assignment from: a Advanced Micro Devices, b IBM, c Intel d Infineon Read more >>

Further optimization of plasma nitridation of ultra-thin oxides for 65-nm node MOSFETS

01 August 2004 | Edition 23, Wafer Processing
P.A. Kraus, T.C. Chua, K. Z. Ahmed, J. Campbell, F. Nouri & J. Cruse, Applied Materials, Sunnyvale, CA, USA, A. Rothschild, A. Veloso, S. Mertens & M. Schaekers, IMEC, Leuven, Belgium, F.N. Cubaynes, Philips Research Leuven, Leuven, Belgium, L. Date & R. Schreutelkamp, Applied Materials Belgium, Leuven, Belgium & T. M. Bauer, Sandia National Laboratories, Albuquerque, NM, USA Read more >>

Extraction and prediction of effective εr values for the 45-nm technology node

01 August 2004 | Edition 23, Wafer Processing
Andreas Knorr, International SEMATECH/Infineon Technologies, Klaus Pfeifer, International SEMATECH & Bernd Kastenmeier, International SEMATECH/IBM Corporation Read more >>

Copper metallization for advanced interconnects: the electrochemical revolution

01 August 2004 | Edition 23, Wafer Processing
P.H. Haumessera, M. Cordeaua, S. Maîtrejeana & T. Mouriera, CEA-LETI, Grenoble, France, L.G. Gosset & W.F.A. Besling, Philips Semiconductors Crolles R&D, Crolles, France, G. Passemardc & J. Torresc, STMicroelectronics, Crolles, France Read more >>