Online information source for semiconductor professionals

White Papers > Edition 19

Securing F2 supply for the semiconductor and TFT-LCD industries

01 September 2003 | Edition 19, Materials and Gases
Takako Kimura, Kayo Momoda & Jun Sonobe, Air Liquide Laboratories,Wadai 28, Tsukuba-Shi, Ibaraki-ken, Japan. Yoshihiro Ueno, Air Liquide Japan, Roppongi 1-chome, Minato Ku, Tokyo 106-6010, Japan. Jean-Marc Girard, Air Liquide Electronics Corporate Division, Paris, France Read more >>

Scaling plasma-nitrided gate dielectrics to the 65-nm node

01 September 2003 | Edition 19, Wafer Processing
P.A. Kraus, C.S. Olsen, K. Ahmed, T.C. Chua, R. Zhao, F. Nouri, & J. Cushing, Front End Products Group, Applied Materials, Inc., Santa Clara, CA, USA Read more >>

IBMâ??s SiGe BiCMOS technology roadmap

01 September 2003 | Edition 19, Wafer Processing
D.L. Harame, J.S. Dunn, A. Joseph, S.A. St. Onge, D. Coolbaugh, V. Ramachandran, J. Johnson, P. Cottrel, R. Singh, C. Dickey, IBM, Essex Junction, Vermont,USA, G. Freeman, D. Ahlgren, D. Greenberg, J.-S. Rieh, B. Jagannathan, S.Subbanna,IBM, Hopewell Junction, NY, USA, M. Meghali, IBM Yorktown Hts., NY, USA, O. Schreiber,MCC, San Diego, CA, USA, & T. Tanji, AMCC, Edina, MN, USA Read more >>

DRAM technology for 100 nm and beyond

01 September 2003 | Edition 19, Wafer Processing
K. H. Küsters, J. Alsmeier, J. Faul, J. Lützen, & T. Zell, Infineon Technologies, Dresden, Germany Read more >>

Dominant role of single-wafer manufacturing in providing sustained growth of the semiconductor indus

01 September 2003 | Edition 19, Wafer Processing
R. Singh1, A. Venkateshan1, M. Fakhruddin1, K. F. Poole1, N. Balakrishnan2 & L.D. Fredendall2, 1Center for Silicon Nanoelectronics, Clemson University, Clemson, SC, USA, 2Department of Management, Clemson University, Clemson, SC, USA Read more >>

A new step in high-k materials engineering

01 September 2003 | Edition 19, Wafer Processing
Lionel Girardie, MEMSCAP SA, Crolles, France et al Read more >>

A 0.18-µm logic-based MRAM technology for high performance nonvolatile memory applications

01 September 2003 | Edition 19, Wafer Processing
A.R. Sitaram#, D.W. Abraham*, C. Alof#, D. Braun#, S. Brown*, G. Costrini§, F. Findeis#, M. Gaidis§, E. Galligan*,W. Glashauser#, A. Gupta*, H. Hoenigschmid#, J. Hummel§, S. Kanakasabapathy*, I. Kasko#,W. Kim#, U. Klostermann#, G.Y. Lee#, R. Leuschner#, K-S. Low#, Yu Lu*, J. Nützel#, E. O’Sullivan*, C. Park#,W. Raberg#, R. Robertazzi*, C. Sarma#, J. Schmid#, P.L. Trouilloud*, D.Worledge*, G. Wright*,W.J. Gallagher*, & G. Müller#, MRAM Development Alliance, IBM/Infineon Technologies, IBM Semiconductor Research and Development Center, Hopewell Junction, NY 12533, USA (# Infineon Technologies, § IBM Microelectronics Division, *IBM Watson Research Center). Read more >>