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White Papers > Edition 14

Surface Preparation Technology Requirements, Challenges, and Proposed Solutions for Future Semicondu

Surface Preparation Technology Requirements, Challenges, and Proposed Solutions for Future Semiconductor Manufacturing 

JAGDISH PRASAD & M. RAO YALAMANCHILI, SCP Global Technologies, Boise, ID, USA

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National Semiconductor Develops New Complementary Bipolar Process for High Speed, High Performance..

National Semiconductor Develops New Complementary Bipolar Process for High Speed, High Performance Analog

MICHAEL MAIDA, National Semiconductor GmbH, Fürstenfeldbruck, Germany

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Interconnect Strategies and Deep Submicron CMOS Manufacture

KENNETH ROSE & CHRISTOPHER MARK, Rensselaer Polytechnic Institute, Troy, NY, USA Read more >>

Dry Etching of High-k Materials for Future Memory Applications

STEFAN SCHNEIDER, Forschungszentrum Jülich, Jülich, Germany Read more >>

Copper Removal Processes for Microelectronics Applications

RAJIB AHMED, BRIAN SOPKO & JACOB JORNE, University of Rochester, Rochester, NY, USA Read more >>

Characterisation of Porous Low Dielectric Constant Films by Ellipsometric Porosimetry

MIKHAIL R. BAKLANOV & KONSTANTIN P. MOGILNIKOV, XPEQT, Tessenderlo, Belgium Read more >>

Barriers for Cu/low k Damascene Structures

KAREN MAEX, ZS. TOKEI, A. SATTA, F. LANCKMANS, W. WU & F. IACOPI, IMEC, Leuven, Belgium Read more >>

Automated Online Control of Plating Bath Additives Increases Wafer Yield

PETER BRATIN, GENE CHALYT & MICHAEL PAVLOV, ECI Technology, East Rutherford, NJ, USA Read more >>

Achieving Higher Productivity in Oxide CMP

CHAD C. GARRETSON, JEFF P. RUDD, BRIAN J. BROWN, DAN FLYNN & STEVE CHEN, Applied Materials, Santa Clara, CA, USA Read more >>

A New Advanced System for Defect Identification on Unpatterned Wafers: the WM-3000 FOUP

PETER-M. HEINZE, Macrotron Systems GmbH, München, Germany Read more >>