Online information source for semiconductor professionals

The SiGe:C Epitaxy Process

Popular articles

New Product: Applied Materials new EUV reticle etch system provides nanometer-level accuracy - 19 September 2011

Oberai discusses Magma’s move into solar PV yield management space - 29 August 2008

‚??Velocity‚?? the new buzzword in Intel‚??s PQS annual awards - 12 April 2012

Applied Materials adds Jim Rogers to Board of Directors - 29 April 2008

TSMC honors suppliers at annual Supply Chain Management Forum - 03 December 2008

JILL C. HILDRETH, JEFFREY A. CHAN, ANDREW S. MORTON & HEATHER KRETZSCHMAR, Motorola Inc., Chandler, AZ, USA

ABSTRACT

To meet the high-frequency demands of today’s wireless market, SiGe:C heterojunction bipolar transistors have grown in popularity. This need for speed has forced the novel process of SiGe:C epitaxy out of the development laboratory and onto the factory floor. Not only must the SiGe:C process meet device and product specifications, but to be cost effective, it must include a process and tool monitoring plan that can be executed around the clock by manufacturing personnel. Described within is a methodology for manufacturing SiGe:C films with industry-leading film quality using a reduced-pressure CVD reactor for deposition. Use of this methodology has enabled Motorola to qualify SiGe:C for production on a 0.35 μm BiCMOS platform.

Download Please login to download the paper. No account yet? Please register. It's free!

Related articles

Advancements in SiGe Epitaxy for Production Applications - 01 March 1999

SOI opens enhanced opportunities - 01 March 2004

Selective epitaxy removes roadblocks in the quest for speed - 01 March 2004

Innovations in Silicon Germanium Bicmos Processing - 01 June 2000

Jazz juggles with low cost 130nm process - 05 October 2005

Reader comments

No comments yet!

Post your comment

Name:
Email:
Please enter the word you see in the image below: