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The integration of high-k dielectrics: A story of modest achievements

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Matty Caymax & Mieke Van Bavel, IMEC, Leuven, Belgium

ABSTRACT

As CMOS scaling moves on, the physical thickness of the gate dielectric layer rapidly decreases, which can cause excessive gate leakage currents due to direct tunneling. This necessitates the use of alternative materials. Candidate highk materials are metal oxides such as Al2O3, ZrO2 and HfO2 and various aluminates and silicate alloys. Although some very promising results have been reported worldwide, problems related to the materials and their electrical characteristics, as well as physical processing still need to be tackled. This article reports the promising results of work carried out at IMEC and discusses considerations and challenges that researchers face when integrating high-k materials in CMOS processing.

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