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Stephen M. Rossnagel & Hyungjun Kim, IBM, USA

ABSTRACT

Atomic layer deposition (ALD) has sparked a lot of interest in the interconnect world for a number of reasons. The continued scaling of wafer dimensions is reaching the sub- 100 nm range today, and will soon reach the sub-50 nm realm and beyond. This puts pressure on each of the layers or structures used in the interconnect features to be as thin and as perfect as possible. Since Cu is both a bad contaminant for Si and most dielectrics, as well as readily contaminated itself by oxygen, nitrogen, water or organics from either the dielectric or the various manufacturing processes used, functional diffusion barriers and adhesion layers must be used to encapsulate the Cu. However, these must be kept to an absolute minimum thickness. Layers that are too thick displace the low resistivity Cu conductive elements (vias and lines), resulting in increased resistance and slower, hotter-running circuits.