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Surface Preparation Technology Requirements, Challenges, and Proposed Solutions for Future Semicondu
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ABSTRACT
As the physical and electrical limits of SiO2 are approached, surface contamination such as micro-roughness,
particles, watermarks, and metals will have a greater impact on the next generation device yield. The stringent
surface contamination requirements [1] outlined in the International Technology Roadmap for Semiconductors
(ITRS) pose new challenges for the surface preparation technology. To meet the ITRS requirements for surface preparation
and to overcome the posed challenges, new processes and technology will be needed.
In this paper we present results of the surface preparation processes developed specifically to meet the ITRS requirements outlined for particles, watermarks, surface roughness and metallic contamination. These processes include a) a dilute SC1 process with integrated rinse (termed “SC1 Pro-Rinse”) for improved surface roughness and particle removal and b) a drying process (termed “GreenDry”) with integrated chemical injection and rinse steps for watermark free final rinsing and drying. Results from these new surface preparation processes clearly indicate that these new technologies not only meet ITRS requirements but also help reduce ESH impact by reduction in DI water consumption.
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