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Production processes for inducing strain in CMOS channels

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Amir Al-Bayati, Lori Washington, Li-Qun Xia, Mihaela Balseanu, Zheng Yuan, Mark Kawaguchi, Faran Nouri & Reza Arghavani, Applied Materials, Inc., USA

ABSTRACT

A key method being used to extend Moore’s Law to the 45nm node and beyond is to induce local, uniaxial tensile/compressive strain in the channel of a MOSFET to dramatically boost device performance. Three different families of films are the leading approaches for stress induction. Newly developed silicon nitride (SiN) films with stress varying from –3.0GPa to 1.9GPa can induce stress in the channel when used over a gate stack or engineered into STI processing. Tensile and compressive oxides induce further stress when used in STI or post gate stack processing. Finally, the use of selective epitaxial SiGe deposited in recessed/raised source/drain structures is an alternative method of stress induction. Developments have focused on increasing individual film stress and incorporating multiple stress films to induce even larger strain in the channel to maximize performance. This article reviews recent advances in process methods of generating local stress.

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