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Jane P. Chang & Lin Sha*, Department of Chemical Engineering, University of California, Los Angeles, USA
*Currently at Intel Corporation, Oregon.

 
ABSTRACT

The aggressive down-scaling of microelectronics devices into the nano-scale poses great challenges to plasma etching in patterning novel materials, such as high-k gate dielectrics. To design and optimize these chemically enhanced etching processes to better control the surface etching specificity and selectivity, it is crucial to understand two mechanisms that dictate the plasma–surface interactions: the ion energies with respect to the etching threshold energy and the addition of passivants.