Online information source for semiconductor professionals

Mask Error Factor and Critical Dimension Budgets for Sub-Half Micron CMOS Processes

Popular articles

New Product: Applied Materials new EUV reticle etch system provides nanometer-level accuracy - 19 September 2011

Oberai discusses Magma’s move into solar PV yield management space - 29 August 2008

‚??Velocity‚?? the new buzzword in Intel‚??s PQS annual awards - 12 April 2012

Applied Materials adds Jim Rogers to Board of Directors - 29 April 2008

New Product: ASML Brion‚??s Tachyon MB-SRAF enables OPC-like compute times - 19 September 2011

GRAHAM ARTHUR, Rutherford Appleton Laboratory, Didcot, Oxon, UK
BRIAN MARTIN, Mitel Semiconductor, Plymouth, Devon, UK

The effect known as mask error factor (MEF) is investigated using the optical lithography simulation tool PROLITH/2 with a well tried and tuned set of simulation parameters. These investigations are extended to include the effect of pitch, linewidth, optical proximity correction, focus, lens aberrations, partial coherence, resist contrast, resist thickness and exposure. Through the use of focus-exposure matrices, process windows and manufacturing critical dimension (CD) budgets, the impact on reticle procurement specifications is also examined.
Download Please login to download the paper. No account yet? Please register. It's free!

Related articles

Some Challenges for Mask-Making to Keep Up With the Roadmap - 01 December 1999

New Product: Brion generates co-optimization of source and mask in Tachyon SMO - 26 February 2009

100nm Generation Contact Patterning by Low Temperature 193nm Resist Reflow Process - 01 March 2002

New Product: Synopsys Proteus LRC offers 28nm and below lithography verification - 02 March 2011

Defect Reduction Methodology in the Lithography Module - 01 December 1999

Reader comments

No comments yet!

Post your comment

Please enter the word you see in the image below: