Online information source for semiconductor professionals

Lithography cell productivity improvement approaches

01 December 2006 | By Mark Osborne | White Papers > Edition 32, Lithography

Popular articles

New Product: Applied Materials new EUV reticle etch system provides nanometer-level accuracy - 19 September 2011

Oberai discusses Magma’s move into solar PV yield management space - 29 August 2008

‚??Velocity‚?? the new buzzword in Intel‚??s PQS annual awards - 12 April 2012

Applied Materials adds Jim Rogers to Board of Directors - 29 April 2008

New Product: ASML Brion‚??s Tachyon MB-SRAF enables OPC-like compute times - 19 September 2011

Stefan Hempel, Steffen Volt, & Wolfram Grundke, AMD, Dresden, Germany



Lithography scanners represent the most cost-intensive tools in a semiconductor facility. Productivity improvements on litho clusters not only increase the whole lithography productivity but also enhance the entire fab performance.

To ensure a cost-efficient lithography process, the scanner should always represent the internal bottleneck within a linked lithography cell. Therefore, it is specifically important to maximize the scanner performance and its output.

This paper provides an overview of methods and approaches to increase the productivity of linked lithography cells. An adaptation model summarizes procedures to adjust track and scanner process times per lithography layer and product. It shows which entity is the actual internal bottleneck and what changes have to be made to achieve a well-working litho cell.

Cell overhead times are investigated and approaches are pointed out to reduce these time losses.

All given facts and methods in this paper are based on a recent successfully accomplished improvement project at AMD Dresden site driven by Industrial Engineering and the lithography department. This team has been very successful in pushing the lithography cell output beyond its earlier projected limits.


Download Please login to download the paper. No account yet? Please register. It's free!

Related articles

Increasing Productivity in Existing Fabs by Simplified Tool Interconnection - 01 June 2000

Manufacturing productivity continuous improvement programmes - 01 March 2003

New Product: SOKUDO‚??s new RF3T system pushes 200wph throughput - 03 December 2007

New Product: ASML‚??s new TWINSCAN NXT platform has a new planar wafer stage design - 29 January 2009

SEMATECH starts extension work on immersion lithography - 09 September 2005

Reader comments

No comments yet!

Post your comment

Please enter the word you see in the image below: