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Impact of single-wafer clean on manufacturing efficiency ‚?? semiconductor fab perspective

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Ashwin Ghatalia, Kranthi Adusimilli, Dave Dyer, Walter Worth, Robert Wright, Phil Naughton, Joel Barnett, Steve Burnett


The International Technology Roadmap for Semiconductors (ITRS) lists several major challenges for IC factory integration. Two of them are factory flexibility and management of factory complexity. These two requirements stem from major business and technology drivers: 1) the advent of system-on-a-chip (SOC) needed for optimal performance and specific applications; 2) the continued need to process multiple generation technologies, multiple process flows, and variations in equipment processes within a single factory; 3) the demand for performance improvements, technology upgrades, custom designs, and design verifications; and 4) the continued demand for reduced cycle and delivery times. These factors result in a proliferation of part numbers and a need for variable batch sizes, which in turn challenge factory operational efficiency and product logistics. Underlying all of these is the increasing cost of more stringent environmental regulations. While many of the tools in a fab are capable of single-wafer processing and enable variable batch-size processing, wet chemical processes and some hot furnace operations are still largely batch operations. This article compares single-wafer clean to current batch processes from an overall IC factory perspective. Tools, factory-level investments, facilities, cycle time, factory logistical impacts and environmental issues are addressed. The influence of different equipment configurations is also investigated.
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