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Copper Metallization Technology for ULSI Chip Interconnects

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MEHRDAD M. MOSLEHI, AJIT PARANJPE, LINO VELO AND TOM OMSTEAD, CVC, Inc., Fremont, CA, USA

ABSTRACT

The use of copper interconnects enables higher speed, enhanced electromigration lifetime re liability, reduced power consumption, and ultimately reduced manufacturing cost for silicon integrated circuits. Formation of inlaid copper interconnectsp referably requires sequential deposition of a continuous diffusion barrier layer followed by void-fre e copper deposition. This paper presents a vacuumintegrated cluster tool technology for deposition of high-quality TaN barrier and copper layers using metalo rganic chemical-vapour deposition (MOCVD). The MOCVD-based TaN layers deposited below 450ºC are highly c o n f o rmal, have 800-1000 μW cm resistivity, have excellent adhesion to silicon dioxide, and provide superior diffusion barrier properties compared to Ta and TaN layers deposited by PVD. The cluster MOCVDCu process is capable of depositing highly conformal and low-resistivity copper seed layers with excellent adhesion for subsequent copper filling by either electrochemical deposition or MOCVD. The cluster MOCVD technology has been used to fabricate high-quality inlaid copper metallization lines and plugs based on CMP damascene processing. The combination of MOCVD TaN and MOCVD copper provide an extendible multi-generation copper metallization solution for 0.15 μm technology nodes and beyond.
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