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White Papers
Edition 38: The holistic route to high yields at smallest feature sizes
By Bernardo Kastrup, ASML, Veldhoven, The Netherlands - ABSTRACT - Feature shrink is the force that drives the semiconductor industry forward. At each step along the technology roadmap, manufacturers need to be able to produce chips efficiently, cost effectively and with high yield. As feature sizes become ever smaller, the manufacturing challenges increase almost exponentially, putting extremely tight requirements on parameters such as overlay and critical dimension uniformity (CDU). Even the tiniest process variation can have a potentially disastrous effect. In order to remedy these challenges, this paper’s proposal for a holistic manufacturing approach claims to avoid these effects by looking at all of the essential steps and processes together as a whole.
Edition 38: Metrology equipment for the 45-32nm nodes
For a state-of-the-art fab to achieve profitable production yields,
successful in-line metrology is essential. Full functionality and high
circuit speed are achieved only through control of defectivity and
tight distributions of feature sizes. In-line monitoring of applicable
metrics is key to ensuring success. It is also used to fine-tune
production processes for improved yield and circuit speed. Metrology
has now become an inherent part of missioncritical production
processes. This article gives a high-level overview of the findings of
the ISMI metrology program to review some of the major manufacturing
challenges at future ITRS technology nodes.
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