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Manufacturing technology for sub-50nm DRAM and NAND Flash memory
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Kinam Kim, Samsung Electronics, Korea
ABSTRACT
This article discusses whether memory technologies can continue to evolve beyond the sub-50nm node, in particular, for dynamic random access memory (DRAM) and NAND flash memories. First, the technological barriers that need to be overcome will be addressed, based on the inherent features of the two memory types. Second, technological solutions will be introduced in detail. Last, manufacturability of each solution will be examined critically. Beyond the 30nm technology node, it is expected that novel transistor schemes with 3-dimensional structures will be incumbent upon both logic and memory array designs, along with the development of new materials.
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