Online information source for semiconductor professionals

Product Briefing Outline: KLA-Tencor has launched its latest mask inspection technology that provides both the versatility in a single system to find all defects on a mask and the facility to show the defects that will print on the wafer. The ‘Wafer Plane Inspection’ (WPI) system is designed to overcome yield-critical 32nm mask defect challenges while operating up to 40 percent faster than previous inspection systems, potentially reducing the percentage of total mask manufacturing time devoted to inspection. WPI technology is undergoing advanced beta testing in conjunction with leading chipmakers in the U.S. and Taiwan. WPI-equipped systems have been shipped to multiple customers. 

Problem: As patterned feature sizes progressively get smaller, the need to inspect photomasks for killer defects at increasingly higher resolution requires continued development of photomask inspection systems. At the 32nm and below, mask inspection requires multiple inspection modes to identify all defects. However, due to the large potential for defect identification it is also important to accurately distinguish which mask defects are likely to transfer to the printed circuit on the wafer. Using the TeraScanHR, engineers are able to identify the direct link between mask inspection and fab yield.

Solution: KLA-Tencor’s WPI inspection technology combines the TeraScanHR system’s ultra-high sensitivity image acquisition technology and computational lithography algorithms to create a comprehensive, high-resolution model of the mask. Computational lithography techniques transform the mask pattern into a highly accurate model of the eventual printed image on the wafer (called ‘wafer plane’). WPI technology also permits mask manufacturers to identify the lithographically-significant defects while ignoring other non-lithographically-significant defects. According to KLA-Tencor, testing performed at multiple customers’ sites validates the ability of the system to use a larger and faster inspection pixel size in cases where the conventional mode would have required a smaller inspection pixel for the most advanced node in development, cutting mask inspection time by up to 40 percent for improved cost of ownership.

Applications: Leading-edge sub-50nm photomask inspection.

Platform: Using the TeraScanHR mask inspection platform, advancements in software algorithm and image computing technologies allow users to access three distinct inspection planes – reticle, aerial and wafer.

Availability: April 2008 onwards.