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Product Briefing Outline: Lam Research has introduced the 2300 Versys Kiyo3x conductor etch series, which the company claims can achieve CD uniformity levels of 1nm across the wafer, a key requirement in double patterning lithography applications. The Kiyo3x is also field-upgradeable and can be used for high-k/metal gate, hardmask open, shallow trench isolation, and strained silicon etch applications. Multiple Kiyo3x systems have been installed at major customer sites in regions worldwide, according to the company.

Problem: As the semiconductor industry transitions to double patterning as a key enabler of advanced device scaling, etch processes play an increasingly important role in pattern shrinking. Conventional applications associated with silicon etch, such as gate and shallow trench isolation (STI), have increased in complexity as geometries have decreased. The transition to 193nm resist is essentially complete, and recent challenges include additional mask steps supporting new integration schemes.

Solution: As the third generation of the ‘Kiyo’ product line, the new system includes improvements in wafer temperature control that enable radial tuning for edge control and profile shaping. These improvements, coupled with enhanced reactor symmetry, are claimed to result in CD uniformities of 1 nm 3-sigma variation. Proprietary pre-coat and post-etch chamber cleaning techniques are employed, resulting in every wafer seeing the same environment for improved repeatability, as well as high uptime and yield. For complex film stacks such as high-k/metal gate, the Kiyo3x provides multi-film etch capability in a single chamber, which is claimed to give a 50-100 percent productivity advantage over a two-chamber approach.

Applications: Double patterning etch and high-k/metal gate etch.

Platform: Third-generation Kiyo series platform. Field upgradeable and configurable to a wide range of advanced etch requirements.  

Availability: June 2008 onwards.