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Mattson Technology has gained an order for its Suprema photoresist strip system from a global semiconductor manufacturer for high-k and metal gate (HKMG) strip application development for 32nm logic devices. Mattson said that it had already shipped the tool and that the customer is expected to be in pilot production in the latter half of 2009. Read more >>

During IMEC’s Annual Research Review Meeting, the R&D facility said it had begun research on resistive RAM (RRAM) cells to tackle the pending scaling challenges of conventional flash memory cells. Research is being focused on stack optimization (including the choice of top and bottom electrode and of the metal oxide), RRAM cell scaling and RRAM integration in a crossbar RRAM array. Read more >>

IMECs research into 3D-SIC (3D stacked IC) technology has reached a new milestone with the announcement that it has recently demonstrated the first functional 3D integrated circuits obtained by die-to-die stacking using 5µm Cu through-silicon vias (TSV). The work was carried out on 200mm wafers using its 130nm CMOS process with the inclusion of a Cu-TSVs process. Read more >>

SSE Group N.V. has said that its subsidiary SSE, Sister Semiconductor Equipment, GmbH has had equipment order push-outs due to the challenging conditions in the semiconductor industry. These push-outs could cause the company to incur a net loss for it current fiscal year compared to previous expectations of  it turning a profit on expected sales of €8.5 million. Read more >>

Numonyx and Elpida have formally entered into a supply contract for NOR flash, which will see Elpida become a foundry partner for Numonyx’s NOR flash at Elpida’s 300mm fab E300 in Hiroshima, Japan. The required technology transfer has started, with initial production expected in the middle of next year, the company said. Read more >>

At the 2008 IEEE International SOI Conference, Innovative Silicon, Inc. (ISi), said that it had demonstrated Z-RAM cells based on Multiple-gate SOI MOSFETS (MUGFETs) with gate lengths down to 50nm and fin widths down to 11nm. Simulations had shown that the basic operational principles are effective on Z-RAM cells with gate lengths down to 12.5nm and fin widths of 3nm. These are the smallest silicon dynamic memory devices ever reported, with the largest programming window, the company said. Read more >>

Ultratech has acquired a range of fundamental patents from IBM, related to rapid thermal annealing. Other patents include temperature control and metrology aspects of the process. Read more >>

Long-standing technology partners Panasonic and Renesas Technology have said they expect to use metal gates and high-k dielectrics for the gate structure with a new ultra low-k dielectric for the interconnect on 32nm SoC devices for future mobile and digital home appliance products. Read more >>

NEXX Systems has taken out a license for Alchimer's eG ViaCoat Cu seed material for through-silicon via (TSV) applications. Alchimer will supply NEXX with process recipes for eG ViaCoat and the use of chemistries to optimize wet Cu TSV metallization. This is the first licensing agreement related to 300mm tools, according to Alchimer. Read more >>

Entrepix has expanded its CMP and SEZ processing services as well as tool refurbishment offerings to the UK and Ireland with the announcement that it will team with UK based Semi Scenic UK Ltd. According to the company, the two countries are increasingly reliant on trailing edge technologies, while still developing novel technologies and therefore a growing market for Entrepix. Read more >>