
Accretech Tokyo Seimitsu has become an associate member in
SEMATECH’s 3D Interconnect Program located at the College of Nanoscale
Science and Engineering (CNSE) of the University at Albany. Launched
two years ago, the 3D program, which includes research into
through-silicon vias (TSVs) as interconnects, is working to enable
high-volume manufacturing of 3D chips by its members.
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Lam Research has cleared the majority of the conditions outstanding in
the purchase of single wafer wet processing specialist, SEZ. The
company now has 94.26 percent of all issued SEZ shares and expects to
complete the deal in March, 2008. SEZ will become a division within Lam
Research.
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After years of development, Qimonda has released information
regarding its ‘Deep-Trench’ process technology replacement - dubbed
‘Buried Wordline’ - that offers greater scaling capability through the
30nm node, as well as a host of process cost and die size savings that,
it claims, are unprecedented.
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Product Briefing Outline: Novellus Systems has
introduced the next generation ‘SABRE Extreme' Electrofill system,
which is designed to tackle the complex transition to the 32nm
technology node. The system has enhanced chemistry, process refinements
and new hardware that are being used in development for 45nm by a
leading U.S. logic customer as well as a leading U.S. DRAM
manufacturer, according to the company.
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August Technology has been granted United States Patent No. 6,947,588 for a method that detects defects on the circumferential edge of a semiconductor wafer.
"Progress in finding an edge inspection solution has moved slowly due to the complexity of curved surface inspection," said Cory Watkins, chief technology officer at August Technology. How many killer defects actually originate at the wafer edge? "As much as 30% in some processes," said Watkins. "Consequently, many killer edge defects escape detection and continue to damage front-side devices by migrating to the front-side or causing gross device failure through a secondary mechanism such as a popping blister or broken wafer."
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Samsung Electronics Co., Ltd., has started to ramp production of 512Mb DRAM for mobile products. The company has begun migration to the 90nm node, which it claims is the first time mobile DRAM is being fabricated at this node.
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ADE Corporation has stated that after an on-site evaluation program with a DSP and analog IDM, believed to be Texas Instruments, the chip manufacturer are purchased one NanoXam non-contact patterned surface wafer metrology system.
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The recently established Fraunhofer-Center Nanoelectronic Technologies in Dresden, Germany has selected Mattson Technology's millisecond flash-assisted rapid thermal processing (fRTP) system as part of its tool set to develop nanotechnology devices & processes through the 22nm node. The emerging millisecond anneal market is anticipated to grow at a compound annual growth rate of 57.6 percent over the next five years, though this comes from a very small starting base. "The CNT will focus on the industry's technological challenges in its transition to nanoelectronics, enabling chipmakers to overcome significant processing obstacles so they can make further device shrinks," said the director Dr. Peter Kuecher. "We are pleased to cooperate with leading semiconductor equipment manufacturers such as Mattson to develop innovative semiconductor process solutions quickly and efficiently to transfer them directly into the manufacturing environment."
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Qualcomm provided a glimpse into its 65nm device ramp today, during a financial analyst conference held in London, England. Dr Sanjay Jha, Qualcomm's Executive Vice President and President of CDMA Technologies Group, highlighted the fabless company's plans to roll out new WCDMA devices next year on a low power consuming 65nm process. The company plans to introduce three key device platforms at the 65nm node in 2006 for WCDMA applications. Under the "Value Platform" Qualcomm will launch its 6245 WEDGE device in 2Q06. In the same period a "Multimedia Platform" device, 6260 carrying HSDPA technology will be launched, while in the 3Q06 period the company plans to introduce an "Enhanced Platform" device dubbed 6280-65 HSDPA, all at the 65nm node.
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LSI Logic is now using Matera Inc's., SENTRY CCM tool for copper bath analysis as part of the copper electroplating process. Metara's SENTRY CCM is an inline mass spectrometry (ILMS) technology that analyses the chemical composition of the copper solution to provide constantly accurate and repeatable electroplating.
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