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Tool Order: FSI wins new order from initial ORION cleaning tool customer

07 January 2009 | Wafer Processing
In quick succession, FSI International has received a follow-on order from the initial customer for its new enclosed chamber, ORION single wafer cleaning platform. The second tool will be used for a wider range of tasks compared to the original tool that went under a detailed evaluation process before being accepted for volume manufacturing for 32nm copper interconnect applications. The second system will be employed for BEOL copper/low-k interconnect cleaning. Read more >>

Brewer Science’s Taiwan lab to use EV Groups wafer bonder for TSV development

07 January 2009 | Wafer Processing
EV Group and Brewer Science are to offer customers in Taiwan and the Asia-Pacific Region access to both companies technology and process offerings for the development and implementation of through-silicon via (TSV) technology for 3D IC packaging. As part of the continued collaboration, EVG's 500 series wafer bonding system was integrated in the applications lab in Taiwan in December 2008. The move is also expected to facilitate training of customer’s engineers in TSV processes. Read more >>

Top 10 Fabtech News Stories for 2008

Micron Technology 300mm DRAM cleanroomAs can be seen from the list below, the most popular 10 news stories had a memory theme running through the majority, with Micron and Qimonda appearing the most. Market research firm, iSuppli took top honours with a memory based market share report, that had Micron in the title, while it was interesting to see that VLSI Research was placed seventh with is 2007 equipment supplier rankings report, which has become a regular favourite over the years. Read more >>

Tool Order: FSI receives acceptance confirmation of new ‘ORION’ cleaning tool

24 December 2008 | Wafer Processing

ORION single wafer cleaning platformFSI International has said it has received an order from a major semiconductor manufacturer that had been evaluating its new ‘ORION’ single wafer cleaning platform, since May, 2008. The system employs a unique closed-chamber design that is claimed to tackle challenging cleaning issues at the 32nm and below. The new system was officially launched in November, 2008.

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TEL licenses ALD batch technology from ASM International

22 December 2008 | Wafer Processing
Tokyo Electron Limited (TEL) has signed a licensing agreement with ASM International covering the Dutch firm's currently filed and issued Atomic Layer Deposition (ALD) patents. TEL plans to use the license to offer batch reactor processes to its customers for sub-32nm applications. TEL’s main single wafer CVD tool is based on the Trias platform. Read more >>

Toshiba illustrates cost-effective 32nm CMOS platform technology

18 December 2008 | Wafer Processing
ToshibaToshiba Corp. has revealed its new cost-effective 32nm CMOS platform technology, that is claimed to halve the cost per function compared to that of 45nm technology. The new technology, claimed to offer higher density and improved performance, was achieved via application of advanced single exposure lithography and gate-first HKMG process technology. It is claimed to enable a 0.124μm2 SRAM cell and a gate density of 3,650 gate/mm2, the smallest SRAM cell in the 32nm generation to date. Read more >>

Tool order: Hynix places order for Mattson’s RTP system

16 December 2008 | Wafer Processing
Mattson HeliosMattson Technology, Inc. has revealed that it has shipped  one of its dual-chamber 300mm rapid thermal processing (RTP) systems to Hynix Semiconductor, Inc.'s R3 memory R&D facility in Korea. The system is currently being installed in Hynix’s facility, will aid in meeting the company’s increased process requirements for high-volume chip manufacturing through the 45nm technology node and beyond. Read more >>

DALSA successfully tests Alchimer’s TSV technology for consumer MEMS

15 December 2008 | Wafer Processing
DALSA successfully tests Alchimer’s TSV technology for consumer MEMSDALSA semiconductor has said that tests undertaken on the eG ViaCoat process from Alchimer S.A. enabled the MEMS device producer to fabricate conformal copper seed layers on through-silicon via structures (TSVs), while overcoming the inherent problems of reentrant TSV, using the Bosch deep reactive ion etching (DRIE) processes. Read more >>

Tokyo Electron delays building new equipment assembly plant

12 December 2008 | Wafer Processing, Cleanroom
Tokyo Electron Limited (TEL) has cancelled the planned groundbreaking of a new equipment assembly plant in Taiwa-cho, Miyagi Prefecture, due to the drop in capital equipment spending in the semiconductor industry and poor industry dynamics expected in 2009. Originally, TEL planned to start construction in April 2009, with completion the same month the following year. Read more >>

Nemotek selects Eyelit’s Integrated MES for new Moroccan wafer fab

11 December 2008 | Wafer Processing
Nemotek WLCNemotek Technologie, a wafer-level cameras, packaging and optics company, has ordered Eyelit Inc.’s manufacturing suite for applications in production support in Nemotek’s new wafer fab in Rabat, Morocco. The order is the second received this month by Eyelit, having only a few weeks ago announced an order from SiCrystal. Read more >>