To maximise yield and limit IC design costs, TSMC is providing access to its tool chain and process models for its 28nm process, in an effort to help designers limit hotspot correction work for lithography limitations. This is a move away from abstracted models, which at these geometries lose information in the translation process, forcing designers to overcompensate for lithography hotspots that take time and increase surface area.
"TSMC is laying the groundwork for 28nm process technologies and below with the industry's first Unified DFM (UDFM) framework and LPC engine, which is destined to become an important consideration," said ST Juang, Senior Director of Design Infrastructure Marketing at TSMC. "At those nodes, it will be exceedingly difficult for design tools to accurately assess lithography issues without access to an exact copy of our tool chain and process models. TSMC UDFM's 'copy exact' approach will not only provide actual lithography hotspot data to designers, but will also open the door for all EDA vendors by enabling encapsulated access to a large part of our manufacturing data."
Initially, TSMC is offering its 28nm lithography process checking (LPC) engine through Synopsys, which has integrated it into its Proteus mask synthesis software. TSMC said that it would make the LPC engine available to all EDA vendors.