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Toshiba and Ponte Solutions are to collaborate on a via and contact etch DFM project that is designed to cut new process/node ramp times by reducing the need to run larger numbers of test wafers. 

"Our agreement with Ponte will allow us to deliver a more robust and high-quality solution to our wafer fabs," said Seiji Onoue, Senior Research Scientist, Process Research Center, Corporate Manufacturing Engineering Center, Toshiba Corporation. "Working with Ponte on the current via and contact etch project, we have been able to extend our analysis beyond standard TCAD environments, making Ponte an essential success partner for us."

"Ponte's physics-based models can predict process variability based on limited process information, so fabs don't need to run large numbers of experimental wafers to tune their processes, leading to faster and cheaper process development," said Ara Markosian, Ponte Solutions CTO. "These models fill the gap between the TCAD environment, traditionally used by R&D teams, and the chip-level environment that designers work in, thus offering a bridge between design and manufacturing teams."

Ponte said that a successful project would result in Toshiba gaining improved prediction levels of design-induced etch rate and CD variations that would aid yields and boost ramp rates.