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Toppan Printing to develop photomask technology with IBM at 14nm node using immersion lithography

17 January 2011 | By Mark Osborne | News > Lithography

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A new agreement between photomask manufacturer, Toppan Printing and IBM will see a collaboration that started at the 45nm node in 2005, extended through 2012 to cover required processes and technologies at the 14nm node. The development work will take place at IBM’s photomask facility in Essex Junction, VT, and Toppan’s Asaka photomask facility in Niiza, Saitama, Japan.

"This newest agreement will help ensure we can continue to develop the leadership in semiconductor technology that is critical for IBM systems, our OEM semiconductor clients, and our JDA partners,” said Michael Cadigan, general manager, IBM Microelectronics. “This collaborative effort builds upon our joint progress at 45nm, 32/28nm and 22/20nm, and sets us on a path to deliver the photomasks needed for the next-generation chip manufacturing production.”

Importantly, the agreement establishes a pathway towards the continued use of ArF immersion lithography to the 14nm node, pushing-out the potential migration to EUV lithography still further.

According to Toppan, its latest photomask technology solution will continue to accommodate the wafer requirements for advanced double patterning and source mask optimization (SMO).

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