Online information source for semiconductor professionals

STMicroelectronics extends DFM collaboration with ASML and Brion through 22nm node

03 December 2009 | By Mark Osborne | News > Lithography

Popular articles

Oberai discusses Magma’s move into solar PV yield management space - 29 August 2008

‚??Velocity‚?? the new buzzword in Intel‚??s PQS annual awards - 12 April 2012

Applied Materials adds Jim Rogers to Board of Directors - 29 April 2008

TSMC honors suppliers at annual Supply Chain Management Forum - 03 December 2008

Sematech Litho Forum: Sematech mulling multi-beam mask writer effort - 12 May 2010

STMicroelectronics has extended its DFM collaboration with ASML and Brion to include the deployment at the 28nm node and 22nm node development. The joint development project has been code-named SOLID (Silicon printing Optimization with Lithography control and Integrated Design). The project is also intended to accelerate time to market for ST.

“This joint development project combined with ASML’s integrated suite of lithography products, including Brion computational solutions and the latest generation of TWINSCAN NXT scanner provides ST with computational and wafer lithography technologies that will enable us to develop optimum manufacturing solutions at 28-nm and below,” said Joël Hartmann, Silicon Technology Development Director for STMicroelectronics, at Crolles, France. “Furthermore this ST-ASML effort is a reinforcement of the Crolles cooperative R&D cluster, which gathers partners around the development and enabling of low-power SoC (System on Chip) and value-added application-specific technologies. This is a perfect example of a project developed within the framework of the Nano2012 program.”

“As a long-time customer of ASML, ST is an excellent partner with whom to explore and develop holistic lithography methods for creating advanced semiconductors,” said Bert Koek, senior vice president, applications product group at ASML.

The new project seeks to optimize the patterning process from design to manufacturing, extend characterization tools and methods to develop new correction/compensation techniques for reducing variability and explore breakthrough lithography solutions for manufacturing complex chips at sub-30-nm nodes.

Related articles

Model-based mask verification used to optimize 45nm RET and OPC strategies - 17 April 2008

STMicroelectronics to use Tachyon OPC+ for 45nm production - 27 March 2008

Brion and Cymer push lithography modelling accuracy - 26 February 2009

Tool Order: Chartered selects double-patterning solutions from Brion - 02 November 2009

Brion and NuFlare collaborate to enhance mask equipment technology - 06 November 2008

Reader comments

No comments yet!

Post your comment

Please enter the word you see in the image below: