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Sematech and Metrosol have announced that the optical metrology company has joined the global chipmaker consortium's Front End Process Technologies program at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. The partnership will expand on collaborative efforts to develop suitable inline metrology techniques to monitor the thickness and composition of various films in high-k dielectric gate and memory stack structures in advanced integrated circuits.  

As a member of this program, Metrosol will collaborate with experts in Sematech's front end processes (FEP) and metrology divisions to develop and demonstrate an inline vacuum ultraviolet spectroscopic reflectometry (VUV-SR)-based platform that will provide the accurate characterization necessary for inline metrology of advanced logic and memory applications for future technology generations. Capable of handling multiple metrology modules on a single platform, Metrosol’s VUV system provides flexibility and throughput.  The platform’s modular architecture and small footprint delivers high throughput inline measurement capabilities, even for advanced applications such as high N, SiON, and HfO2 high-k dielectrics.

"Metrosol is positioned to make significant contributions to the development and production of advanced dielectrics for both logic and memory technologies," said company CEO Kevin Fahey. "Our VUV-SR technology offers the ability to simultaneously measure thicknesses and compositions of individual layers within the high-k dielectric stacks. Our high throughput provides advanced inline process control capability that allows for greater statistical sampling, more accurate information, and faster problem resolution."

"We are pleased to welcome Metrosol to the ever-expanding roster of leading industry partners engaged in cutting-edge nanoelectronics research and development at the UAlbany NanoCollege," said Richard Brilla, VP for strategy, alliances and consortia at CNSE. "This new collaboration will enhance the world-class metrology and characterization capabilities at CNSE’s Albany NanoTech, further demonstrating the success of the SEMATECH-CNSE partnership in accelerating nanoscale innovations, supporting pioneering education and fostering high-tech economic growth, all of which underscore New York’s recognition as a global leader in nanotechnology."     

Sematech and Metrosol say they plan to build optical models for interfacial layers, high-k and metal gate films, and dielectric capping layers, so that reliable thickness and composition measurements may be performed inline using the company's VUV-SR technology for different logic- and memory-based applications.

"This is another major step in developing practical and inline advanced physical characterization methods to support emerging technologies currently under development in Sematech's FEP program," said Raj Jammy, VP of emerging technology at the consortium. "Metrosol is a strong, trusted partner, and its VUV measurement technology complements our own technical expertise, as we work together to extend CMOS logic and memory technologies."

This is not the first collaboration between the two organizations. In 2007, Metrosol and Sematech demonstrated inline optical metrology for high-k dielectric composition, thickness, and ultrathin interfacial layer thickness.  The results, jointly presented at the 4th International Symposium on Advanced Gate Stack Technology, were obtained using Metrosol’s VUV-SR metrology system and transistors manufactured with the consortium's HfSiOx gate technology.