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NEC Electronics joins IBM in 32nm and below process development

11 September 2008 | By Mark Osborne | News > Wafer Processing

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IBM airgap process technologyNEC Electronics has become the eighth IBM led joint development alliance member following Chartered Semiconductor, Freescale, Infineon, Samsung Electronics, STMicroelectronics and Toshiba Corporation. NEC is set to work on process technology for the 32nm node and below. NEC is also a partner with Toshiba on process technologies.

"As the 'scaling' of semiconductors to ever smaller feature sizes continues, the cost of conducting basic research and development and the associated capital investment continues to rise," said Gary Patton, vice president, IBM Semiconductor Research & Development Center. "Our unique collaborative model for semiconductor research and development helps to mitigate individual investment while allowing for increased design complexity, shortened time-to-market and quicker integration of next-generation process materials and technology nodes."

"At the highest levels of technology, it is becoming increasingly difficult for semiconductor companies to differentiate their products on the core CMOS process technologies alone. A better course is to share the development costs of a common process platform with leading semiconductor manufacturers from around the world," said Toshio Nakajima, President and CEO, NEC Electronics. "The new agreement with IBM means that NEC Electronics will develop a common semiconductor process with industry leaders, allowing us to focus on being first to market in areas of eDRAM products and SoC solutions that provide our customers with the added value, such as high reliability and low power consumption."

The work will be conducted at IBM's 300mm fab in East Fishkill as well as at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, State University of New York, consistent with all previous alliance announcements.

 

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