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NEC and Toshiba team with IBM on 28nm HKMG process

18 June 2009 | By Mark Osborne | News > Wafer Processing

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NEC Electronics and Toshiba have said that they have extended a technology development agreement with IBM to embrace low-power IC’s using high-k metal gate (HKMG) processes at the 28nm node.

"The advanced 28nm low-power process technology will dramatically enhance the product's density, performance, as well as power consumption compared to the former 40nm node, providing highly competitive solutions, especially in the fields of consumer electronics and automotive." said Masao Fukuma, Senior Vice President of NEC Electronics. "Utilizing this process technology with NEC Electronics' proprietary eDRAM, high-reliability, and low-power consumption technologies, we will focus on being the first to market with the SoC products that can meet our customers' expectations with added value."

"NEC Electronics and Toshiba bring significant skills and resources that will help ensure development of an industry-leading 28nm technology offering," said Gary Patton, Vice President for IBM's Semiconductor Research and Development Center. "Together, the alliance partners will deliver a high-performance, energy efficient technology to enable a full range of multifunction, power-sensitive mobile and consumer electronics."

The IBM alliance claims that internal test results showed the power-efficient advantages of HKMG and device performance that meets or exceeds competitive targets.

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