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Intel on track with 32nm intro in 4Q09

10 December 2008 | By Mark Osborne | News > Wafer Processing

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The development phase of Intel’s 32nm process technology has been completed with production starting on schedule in the fourth quarter of 2009, Intel has announced. The company is to present various technical papers at this year’s International Electron Devices Meeting (IEDM) next week in San Francisco to reinforce this fact.

Although Intel hailed its 45nm process as a major breakthrough for leading-edge semiconductor processing due to the introduction of high-k dielectrics and metal gate stacks (HKMG), its 32nm offering could be more significant on a number of fronts.

Both performance and low power consumption are expected to be significantly improved with the introduction of Intel’s second-generation HKMG technology that is based on more aggressive material selection and overall process integration improvements, compared to the initial introduction at the 45nm node.

Continuing its long-standing development and implementation of transistor strain techniques, which have proven to scale and enhance transistor performance, further improvements are expected to have been made.

Intel claims that coupled with the adoption of 193nm ArF immersion lithography for the first time, it will have the ‘highest transistor performance and the highest transistor density of any reported 32nm technology in the industry.’

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