Online information source for semiconductor professionals

IMEC to use TCAD tools from Synopsys for 3D stacked IC TSVs

09 March 2010 | By Mark Osborne | News > Wafer Processing

Popular articles

Oberai discusses Magma’s move into solar PV yield management space - 29 August 2008

‚??Velocity‚?? the new buzzword in Intel‚??s PQS annual awards - 12 April 2012

Applied Materials adds Jim Rogers to Board of Directors - 29 April 2008

TSMC honors suppliers at annual Supply Chain Management Forum - 03 December 2008

Sematech Litho Forum: Sematech mulling multi-beam mask writer effort - 12 May 2010

IMEC is to use Synopsys TCAD (Technology Computer-Aided Design) finite-element method tools for characterizing and optimizing the reliability and electrical performance of through-silicon vias (TSVs) as part of the nano-electronics research centre’s to accelerate development efforts.

“We consider the availability of Synopsys’ silicon-proven finite-element method tools to be an integral part of deploying 3D stacked IC technology. This collaboration will speed up the development of through-silicon via technologies and will in turn facilitate the adoption of 3D stacked ICs in the semiconductor industry,” said Luc Van den hove, President and Chief Executive Officer of IMEC.

“This collaboration with imec affords us the opportunity to validate Synopsys’ industry- leading TCAD simulation tools for addressing the emerging 3D stacked IC technology. IMEC is an ideal collaboration partner for this effort given its excellent research facilities, industry focus and expertise,” said Howard Ko, general manager and senior vice president of the Silicon Engineering Group at Synopsys.

Related articles

Synopsys and Ovonyx to work on phase change memory device simulation models - 11 September 2008

Synopsys and Mattson join forces on TCAD process simulation for CMOS processes - 16 July 2008

IMEC demonstrates fully functional 3D stacked ICs - 14 October 2008

TCAD models to be developed for cryogenic ion implantation - 11 February 2011

IMEC and SUSS MicroTec join forces on wafer bonding development - 14 July 2009

Reader comments

No comments yet!

Post your comment

Please enter the word you see in the image below: