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IMEC to use TCAD tools from Synopsys for 3D stacked IC TSVs
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IMEC is to use Synopsys TCAD (Technology Computer-Aided Design) finite-element method tools for characterizing and optimizing the reliability and electrical performance of through-silicon vias (TSVs) as part of the nano-electronics research centre’s to accelerate development efforts. “We consider the availability of Synopsys’ silicon-proven finite-element method tools to be an integral part of deploying 3D stacked IC technology. This collaboration will speed up the development of through-silicon via technologies and will in turn facilitate the adoption of 3D stacked ICs in the semiconductor industry,” said Luc Van den hove, President and Chief Executive Officer of IMEC.
“This collaboration with imec affords us the opportunity to validate Synopsys’ industry- leading TCAD simulation tools for addressing the emerging 3D stacked IC technology. IMEC is an ideal collaboration partner for this effort given its excellent research facilities, industry focus and expertise,” said Howard Ko, general manager and senior vice president of the Silicon Engineering Group at Synopsys.