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IBM touts 22nm SRAM with 0.1µm² cell

19 August 2008 | By Mark Osborne | News > Wafer Processing

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IBMAlthough some time away from December’s IEEE International Electron Devices (IEDM) annual technical meeting, IBM and its joint development partners AMD, Freescale, STMicroelectronics, Toshiba and the College of Nanoscale Science and Engineering (CNSE), have announced the fabrication of working SRAM devices at the 22nm node. The conventional six-transistor design has an area of 0.1μm², making it the smallest cell size ever fabricated.

The SRAM cell is said to include band edge high-k metal gate stacks, transistors with less than 25nm gate lengths, thin spacers, novel co-implants, advanced activation techniques, extremely thin silicide, and damascene copper contacts.

IBM hinted that some of these advanced processing techniques would be seen in their 32nm devices.

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