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IBM alliance touts 28nm half-node bulk CMOS process for 2H 2010

16 April 2009 | By Mark Osborne | News > Wafer Processing

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The IBM Technology Alliance partners are set to have a 28nm process ready for risk production in the second-half of 2010, which employs the key features of the 32nm process technology, including high-k metal gates (HKMG), for low power applications. Partner’s include Chartered Semiconductor Manufacturing Ltd. , GLOBALFOUNDRIES, Infineon Technologies , Samsung Electronics, Co., Ltd., and STMicroelectronics.

"This statement of commitment to 28nm low-power technology by the IBM Joint Development Alliance is an important progression from 32nm high-k metal gate technology," said Jorgen Lantto, chief technology officer of ST-Ericsson. "Leaders in the mobile industry can utilize 28nm low-power technology to meet the increasingly aggressive demands for performance and improved battery life."

The Alliance claims that the 28nm process could provide a 40% performance improvement as well as a 20% plus power reduction compared to conventional non-HKMG 45nm technology. An SRAM cell of 0.120 square microns, is said to provide a low minimum voltage operation and low leakage with high stability.

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TSMC squeezes 28nm node into roadmap for 2010 - 29 September 2008

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Reader comments

Question to the Editor: Are you capitalizing GLOBALFOUNDRIES because of their name, long history, established business franchise or market dominance? Or is simply a mistake in the feeds?
By Adolfo Gutierrez on 17 April 2009

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