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Globalfoundries ready for 20nm evaluations

30 August 2011 | By Mark Osborne | News > Wafer Processing

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Test chips from EDA vendors, Cadence Design Systems, Magma Design Automation, Mentor Graphics and Synopsys have been successfully taped out at Globalfoundries, signalling its readiness for customers to begin evaluating their 20nm designs.

“We are committed to providing customers as much of a time-to-market advantage as possible with each new technology we introduce,” noted Mojy Chian, senior vice president of design enablement at GLOBALFOUNDRIES. “Our model of early collaboration with EDA partners accelerates the overall development cycle, and gives customers accessibility to the inner workings of the process so they can begin targeting their designs to the most advanced manufacturing capabilities with confidence. This success is a major achievement toward market readiness of our newest process, and we will continue to enhance the design enablement support available for it.”

According to Globalfoundries, all four EDA companies have demonstrated that their place-and-route (P&R) tools and tech files are capable of supporting the advanced rules associated with the 20nm process, which include library preparation steps for double patterning technology.

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