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e-Shuttle to use D2S‚?? e-beam IC design software on sub-40nm test chips

09 October 2008 | By Mark Osborne | News > Lithography

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Advantest e-beam lithography toole-Shuttle, a joint venture operation of Fujitsu Microelectronics and Advantest, is to use D2S' design for e-beam (DFEB) technology, initially on a 65nm Low Power (LP) library. After refinement, e-Shuttle expects to run tests and validate the technology for 40nm-and-below IC prototypes. DFEB technology employs a character projection (CP) technique, combined with design and software solutions to reduce a design's required shot count, resulting in increased CP e-beam direct write throughput.

"We are uniquely positioned with e-Shuttle as the leader in manufacturing chips using the DFEB approach," said Yoji Hino, Corporate Executive Vice President of Fujitsu Microelectronics Limited.  "We expect to see the benefits of this collaboration, in terms of reduced costs and time savings, starting in 2009.  This design-to-manufacturing collaboration will facilitate a unique capability for virtually maskless ICs that will increase design starts.  Enabling the long tail of ASIC designs, particularly for derivative designs, is beneficial for the semiconductor industry overall."

"e-Shuttle has been in operation since November 2006 with the mission to bring EBDW capabilities to low-volume production applications.  This collaboration further increases the throughput of our production line," said Haruo Tsuchikawa, CEO and President of e-Shuttle, Inc. "We view this type of collaboration between design software, design, manufacturing, and equipment makers to be essential for maximizing the capabilities of today's fabrication technologies."

"Advantest is improving the throughput of the e-beam direct write solution, and the DFEB technology will further increase the throughput of our systems," said Toshio Maruyama, President and CEO of Advantest Corporation.

Custom, low volume ASICs production is at risk due to mask costs approximately doubling at each technology node. EBDW technology has been used for research and prototype IC fabrication for many years. However, throughput issues have restrained wider adoption.

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