Online information source for semiconductor professionals
Applied Materials and AmberWave in strained silicon pact
Popular articles
New Product: Applied Materials new EUV reticle etch system provides nanometer-level accuracy - 19 September 2011
Oberai discusses Magma’s move into solar PV yield management space - 29 August 2008
â??Velocityâ?? the new buzzword in Intelâ??s PQS annual awards - 12 April 2012
Applied Materials adds Jim Rogers to Board of Directors - 29 April 2008
New Product: ASML Brionâ??s Tachyon MB-SRAF enables OPC-like compute times - 19 September 2011
Applied Materials, has entered into an agreement with AmberWave Systems to license AmberWave's strained silicon IP for Applied's use on its Applied Centura RP Epi system.
"Using AmberWave's strained silicon technology and the Applied Centura RP Epi system, we created a highly manufacturable 300mm strained silicon epitaxial process for advanced substrates used in developing high-performance transistor designs," said Dr. Randhir Thakur, Vice President and General Manager of Applied Materials' Front End Products group. "This strained silicon solution can dramatically accelerate the development process for chipmakers and wafer manufacturers without a large investment in process engineering."
AmberWave's strained silicon IP includes proprietary structures and processes to strain or "stretch" silicon's crystalline lattice structure, providing a cost-effective way to increase transistor speed or reduce power consumption. Very high levels of strain can be generated to achieve device improvements on both bulk silicon and SOI (silicon on insulator) wafers without scaling the size of the transistor. Devices fabricated with AmberWave's strained silicon technology are claimed to have demonstrated up to 17% increase in speed and 34% reduction in power consumption compared to transistors fabricated with traditional silicon.