Online information source for semiconductor professionals

News

Epion enters Taiwan market

09 September 2005 | Wafer Processing
Epion Corporation, a gas cluster ion beam (GCIB) systems developer plans to market its line of atomic-scale processing equipment via Marketech International for the country of Taiwan. Read more >>

Order Wins: TSMC in repeat orders with Mattson Technology

08 September 2005 | Wafer Processing
Mattson Technology, has announced repeat order wins from two Taiwanese chip manufacturers, one a foundry with two 300mm fabs (TSMC only) and a DRAM manufacturer, according to the company. Multiple Aspen III Highlands strip tools were installed in two of the foundry's 300 mm fabs for low-k/copper processing, and the Helios RTP system is being used for advanced transistor applications to support the expansion of the DRAM chipmaker's 300 mm fab. Read more >>

Material limits effect low-k

05 February 2005 | Wafer Processing
Presenters at the SEMATECH Low-k Symposium, which attracted approximately 140 technologists to San Diego in late October, appeared to sustain SEMATECH's position that interconnect materials below 2.5 k-effective may be too expensive to develop and too difficult to work with to be economically practical for all design schemes. The search for low-k materials to improve semiconductor interconnects may have reached certain practical limits. Future work will focus less on new, ultra low-k materials, and more on enhancing improvements in process and design, conference participants indicated.
Read more >>

Strained silicon push puts AMD into R&D project

04 February 2005 | Wafer Processing
Albany Nanotech, part of the College of Nanoscale Science and Engineering at the University at Albany - SUNY, and Advanced Micro Devices have entered into a joint R&D project to develop a new nanometrology capability for measuring the stress state in strained silicon. The new technique seeks to enable the stressstate in strained silicon to be measured with a target spatial resolution better than 10nm. The project will focus on near-field nano-optical techniques, exploiting the enhancement of the optical field at a nanoprobe tip. This new technique would enable more accurate measurements. Read more >>

Applied Materials and AmberWave in strained silicon pact

04 February 2005 | Wafer Processing
Applied Materials, has entered into an agreement with AmberWave Systems to license AmberWave's strained silicon IP for Applied's use on its Applied Centura RP Epi system. Read more >>

KLA-Tencor teams with Dainippon Screen to remove critical yield barriers to copper IC production…

04 February 2005 | Wafer Processing
Joint Venture Established to Accelerate Adoption of Innovative Film Deposition Technology. KLA-Tencor and Dainippon Screen Manufacturing Company, Ltd are partnering to commercialize advanced process solutions. The partnership also involves Blue29, a Silicon Valley start-up that has developed an innovative electroless film deposition technology for copper interconnects. Originally a KLA-Tencor venture capital investment, Blue29 has now become a wholly-owned joint venture between KLA-Tencor and Dainippon Screen... Read more >>

Sopra uses IMEC patented ellipsometric porosimetry technology

04 February 2005 | Wafer Processing
IMEC has licensed its ellipsometric porosimetry (EP) technology to Sopra in an effort to assist in the on-going development of ultra-low k materials.  IMEC pioneered the use of EP for its Advanced Interconnect Solutions R&D Program. The R&D EP tool was extensively benchmarked with other porosimetry technologies (e.g. PAIS SAXS, SANS). and excellent agreement was demonstrated.  Sopra ad its first commercial products using EP shipping in Summer of 2004. Read more >>

Chipworks reveals 3D memory

04 February 2005 | Wafer Processing
Chipworks Inc. announced at SEMICON Japan it is analyzing what is on record as being the world's first product implementation of 3D memory. Mattel recently entered the children's portable video player with the Juice Box. "The Mattel Juice Box uses a proprietary flash memory card format so that they can sell video content such as cartoons and skateboarding shows. What makes this product so interesting is that it is the first implementation of 3D memory and was developed by start-up company Matrix Semiconductor" said Gary Tomkins, manager of process analysis for Chipworks.
Read more >>

ST completes 65nm SOC demonstrator

04 February 2005 | Wafer Processing
STMicroelectronics has claimed an important milestone by delivering a 65nm CMOS design platform. In addition, ST announced the completion of a tape-out, of a 65nm complex system- on-chip to fully demonstrate its advanced technology. Read more >>

SELETE completes 65nm CMOS logic process

04 February 2005 | Wafer Processing
Semiconductor Leading Edge Technologies Inc, (SELETE) the Japanese led IC manufacturers consortium has concluded process development work on "hp 65nm" node CMOS process modules. Read more >>