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News

Carl Zeiss demonstrates successful overlay metrology system for double patterning

29 July 2010
The jointly developed ‘PROVE’ overlay metrology system between Carl Zeiss and SEMATECH has successfully passed a key development milestone, according to the partners. The system has achieved .5nm repeatability and 1.0nm accuracy in image placement, registration and overlay measurement for double patterning photomasks, a key requirement for extending 193nm ArF lithography to the 32nm node and below. Read more >>

GlobalFoundries elects to invest in production ready EUV lithography for Fab 8 in 2012

15 July 2010
In another aggressive move to push ahead of its foundry competitors, GlobalFoundries is side-stepping the purchase of pre-production EUV tools and moving directly to production tool sets at Fab 8 in upstate New York, according to Gregg Bartlett, Senior Vice President of Technology and R&D at the foundry, during a keynote address at SEMICON West. The EUV tool, expected to be supplied by ASML will be installed in the second half of 2012, Bartlett said. Read more >>

First EUV mask inspection tool to be developed

08 July 2010
A long-running issue in photomask inspection and more so in relation to EUV technology is the lack of development or existence of the required tools, due to the limited expected market and ROI for the equipment vendor. However, SEMATECH and Carl Zeiss are to now design and develop the industry’s first-ever actinic aerial image metrology system ‘AIMS’ for defect review of EUV photomasks. Read more >>

Product Briefings

New Product: Eco-Snow technology improves efficiency of photomasks and reticle cleaning

14 January 2010
Product Briefing Outline: Eco-Snow's advanced, automated MaskClean 150 System is a dry CO2 alternative to conventional cleaning methods for removing particulate and light organic contamination from the surface of photomask substrates. The system is helping a major U.S. photomask manufacturer save money and improve the quality of its photomasks and reticles with a cleaning technology designed for the 28nm DRAM half-pitch technology node. The system reclaims masks by removing contaminants left behind by wet cleaning; preserves mask quality by reducing the number of erosive wet cleaning cycles required and reduces the cycle time required to create masks, since fewer cleanings are needed. Read more >>

New Product: Luminescent offers offline computational mask inspection

30 July 2009
Product Briefing Outline: Luminescent Technologies, has broadened its product portfolio by adding what it claims to be the industry’s first offline computational mask inspection product. A premier company in Asia is the first customer to qualify the new computational defect review product in volume production. Read more >>

New Product: New XP upgrade for KLA-Tencor’s 28xx defect inspection systems boosts sensitivity

02 July 2009
Product Briefing Outline: KLA-Tencor has announced XP, a new upgrade package for 28xx broadband brightfield inspection systems. The XP package is the first commercially available product to give an inspection system access to standard IC design layout files. With access to this information, the inspection system can use knowledge of the defect’s location within the circuit to better estimate its probability of affecting device yield. In addition, XP can use the results of the design-aware wafer inspection to identify features on the mask that may be particularly sensitive to process variations during printing. These and other features of the XP upgrade package are designed to improve the sensitivity and productivity of existing 28xx inspectors and raise the information content of defect results, helping to accelerate identification and resolution of defect issues. Read more >>

White Papers

Edition 38: The holistic route to high yields at smallest feature sizes

08 January 2009

FT38By Bernardo Kastrup, ASML, Veldhoven, The Netherlands - ABSTRACT - Feature shrink is the force that drives the semiconductor industry forward. At each step along the technology roadmap, manufacturers need to be able to produce chips efficiently, cost effectively and with high yield. As feature sizes become ever smaller, the manufacturing challenges increase almost exponentially, putting extremely tight requirements on parameters such as overlay and critical dimension uniformity (CDU). Even the tiniest process variation can have a potentially disastrous effect. In order to remedy these challenges, this paper’s proposal for a holistic manufacturing approach claims to avoid these effects by looking at all of the essential steps and processes together as a whole.

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Sources of overlay error in double patterning integration schemes

01 March 2008
David Laidler, Philippe Leray, Koen D’Havé & Shaunee Cheng, IMEC, Leuven, Belgium Read more >>

193nm reticle haze: the dirty little secret and its ultimate solution?

01 March 2008 | Comments (2)
Oleg Kishkovich, Anatoly Grayfer & Frank V. Belanger, Entegris, Inc., Franklin, MA, USA Read more >>