To maximise yield and limit IC design costs, TSMC is providing access to its tool chain and process models for its 28nm process, in an effort to help designers limit hotspot correction work for lithography limitations. This is a move away from abstracted models, which at these geometries lose information in the translation process, forcing designers to overcompensate for lithography hotspots that take time and increase surface area.
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Applied Materials has said that it is significantly reducing its involvement in joint venture lithography track equipment supplier Sokudo. Applied has revised its ownership position with partner Dainippon Screen from a 48% interest when the venture was established in mid-2006, to a 19% stake. Tokyo Electron has been the dominant track supplier for 300mm lithography tools.
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Product Briefing Outline: KLA-Tencor has announced XP, a new upgrade package for 28xx broadband brightfield inspection systems. The XP package is the first commercially available product to give an inspection system access to standard IC design layout files. With access to this information, the inspection system can use knowledge of the defect’s location within the circuit to better estimate its probability of affecting device yield. In addition, XP can use the results of the design-aware wafer inspection to identify features on the mask that may be particularly sensitive to process variations during printing. These and other features of the XP upgrade package are designed to improve the sensitivity and productivity of existing 28xx inspectors and raise the information content of defect results, helping to accelerate identification and resolution of defect issues.
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Product Briefing Outline: Sokudo Co., Ltd. has recently launched the SOKUDO DUO platform, a new concept in photoresist coat/develop track systems that provides customers with the ultra-high productivity needed to optimize leading-edge lithography processing. Incorporating an innovative dual track design, the system simultaneously processes wafers in two lines, claimed to boost throughput to 250-300 wafers per hour (wph), depending on system configuration, while also improving uptime and substantially reducing system footprint.
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Product Briefing Outline: KLA-Tencor and Tokyo Electron Limited (TEL) have introduced the ‘AcuShape,’ a new modeling and library-generation package to meet optical critical dimension metrology requirements for the 32nm node and below. The new software package enables metrology engineers in IC fabs to measure the dimensions of 3D logic and memory structures, such as FinFETs, bulb RCATs, and structures created by the advanced patterning technique called spacer pitch splitting. It is designed to operate on KLA-Tencor’s stand-alone optical critical dimension platform, ‘SpectraCD’, and Timbre Integrated Metrology (IM) CD systems. AcuShape has been shipped to several memory, logic and foundry fabs in the United States, Europe, Japan, Korea and Taiwan, where it is being used to measure production wafers and provide early learning on advanced R&D structures.
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By Bernardo Kastrup, ASML, Veldhoven, The Netherlands - ABSTRACT - Feature shrink is the force that drives the semiconductor industry forward. At each step along the technology roadmap, manufacturers need to be able to produce chips efficiently, cost effectively and with high yield. As feature sizes become ever smaller, the manufacturing challenges increase almost exponentially, putting extremely tight requirements on parameters such as overlay and critical dimension uniformity (CDU). Even the tiniest process variation can have a potentially disastrous effect. In order to remedy these challenges, this paper’s proposal for a holistic manufacturing approach claims to avoid these effects by looking at all of the essential steps and processes together as a whole.