Online information source for semiconductor professionals

RIP, R&D: New innovation models taking hold as semiconductor industry‚??s R&D progress slows

14 January 2010 | By Mark Osborne | Editor's Blog

Popular articles

‚??Velocity‚?? the new buzzword in Intel‚??s PQS annual awards - 12 April 2012

Oberai discusses Magma’s move into solar PV yield management space - 29 August 2008

Applied Materials adds Jim Rogers to Board of Directors - 29 April 2008

TSMC honors suppliers at annual Supply Chain Management Forum - 03 December 2008

Sematech Litho Forum: Sematech mulling multi-beam mask writer effort - 12 May 2010

Guest blog by Tod Higinbotham, Executive Vice President, Process Solutions, ATMI

The recent economic downturn has taught us that semiconductor technology research and development must change if the industry is to prosper.  Circuit design, advanced materials, and innovative process and process flows compel our industry to rethink outdated R&D techniques as we search for a better way to realize the potential of today’s most advanced integrated circuit technology.

Just a decade ago, the semiconductor industry revolved around very few materials. Since production of the earliest ICs, a readily identifiable group of the same dielectrics, dopants and like substances were applied with only limited refinements or modifications. All that changed dramatically after the introduction of copper. Now, it seems virtually every node requires no fewer than a dozen new materials.  With today’s financial pressures – and the pressure to discover new solutions as fast as possible – traditional R&D approaches and methods are no longer viable. But with new economic environments and technology challenges comes the drive toward innovative solutions. Traditional R&D as we know it may be dying away. We have entered what I believe is The Age of Development Efficiency, where speed to solution and maximized execution are key.

In logic technology, the shift to 22nm highlights the growing importance of materials innovation: the process encompasses 45 new materials and in some cases over 1,000 process steps.  The challenge for memory companies is becoming more daunting as well, with new process flows incorporating copper wiring that encompass over 500 process steps. 

Frankly, in our industry new materials development has remained a relatively slow and resource-intensive process involving four discrete stages (materials R&D, unit process R&D, process integration and device performance optimization). These steps must be performed sequentially, and it’s not unusual for the entire sequence to take 1-2 years. 

Just over a year ago, ATMI launched four High Productivity Development Centers around the world to help accelerate the development and integration of new materials and processes. The Centers capitalize on combinatorial science, an approach that enables companies to assess many different materials simultaneously and to arrive at the optimal process at a fraction of the time and cost previously required. 

With this approach, tasks need not be organized sequentially – instead, they are separated into roughly concurrent primary, secondary and tertiary screening phases. Earlier phases can be conducted on small areas of relatively inexpensive blanket substrates, so many experiments take place at the same time. Only candidates that meet certain criteria are moved to secondary and tertiary phases, where candidate materials can be tried on increasingly more complex test wafers – up to and including full patterned wafers suitable for reinsertion and subsequent process steps which allow for highly representative process integration results. This helps a team quickly focus on only the most promising possibilities, and arrive at the optimal process faster and with vastly more information.

While high productivity methods clearly improve R&D efficiency and effectiveness, they also open the door to significant economic gains. Semiconductor manufacturers that have leveraged this approach find it provides rapid learning cycles with minimum expenditures on silicon and test materials. To date, it’s been used successfully in applications such as copper-loop integration, advanced transistor materials and process flows, and advanced patterning, utilizing formulated chemistries and/or precursors.

For example, ATMI used this type of combinatorial workflow to speed development of a new post-CMP cleaning formulation for one of its customers. Wafers from the manufacturer had undergone normal copper metallization and CMP processes. Applying High Productivity Development tools and methods, ATMI engineers devised and conducted 1,300 experiments on 16 wafers in just three-and-a-half weeks. The same tests using conventional methods would have required at least 1,300 wafers and spanned approximately six months.

High Productivity Development represents a sea-change for semiconductor technology development. This new collaborative model holds great promise for helping companies reduce the time and resources required for R&D.  It results in a dramatic boost in process efficiency, and yields a much stronger return on investment rather than simply shifting costs. 

Related articles

CIMAC to sell Korean firms automation software in U.S. - 26 September 2008

A Revolution in Test ‚?? The Death of Packaging - 01 December 1999

New Product: TSMC targets 32nm DFM requirements with a new unified design methodology - 10 June 2008

Edition 38: 300mm Activity Report - May to October 2008 - 09 February 2009

Levitech secures ‚?¨5 million investment and ‚?¨2.4 million innovation credit - 07 March 2011

Reader comments

No comments yet!

Post your comment

Name:
Email:
Please enter the word you see in the image below: