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Home arrow News arrow Latest News arrow New hopes for nitride-based non-volatile Flash memory
New hopes for nitride-based non-volatile Flash memory Print E-mail
Oct 18, 2005 at 11:40 AM
By Dr Mike Cooke

IMEC and Infineon Technologies have jointly developed a profiling technique for the accurate extraction of charge profiles in nitride-based memory to allow the optimization of write/erase voltages in a novel operating mode. It is hoped that this result may overcome major reliability problems of nitride-based memory that have hampered their competitiveness in the non-volatile Flash market.
The profiling technique developed by IMEC and Infineon may allow nitride technology to compete with (conventional) Flash over its full application range of both stand-alone code and data storage Flash, as well as in the embedded arena such as automotive applications.

Nitride memory promises process simplicity. The memory structure uses a highly localized charge trapping mechanism in nanoscale material defects. The partners hope that this mechanism could turn out to be more scalable (shrinkable) than the conventional floating gate approach that is widely used in Flash memories today.

However, the nitride dual bit storage requires hot holes for the erase step. This results in an accumulation of residual charges over a number of write/erase cycles. New reliability issues include memory window walk-out (unstable threshold voltage) and degradation of the retention after cycling (RAC). These problems impede the further dissemination of nitride technology into the wide variety of Flash application areas. As a consequence, the local charge storage concept is only competitive within a small segment of the Flash market today.

The new profiling technique enables the accurate and independent extraction of both electron and hole distributions for the first time. Based on this technique, write and erase operations have been optimised and a new operating mode has been found which leads to a 100% matching of the carrier profiles. In the case of complete matching after one write/erase cycle (i.e. the injected holes exactly compensate for the first injected electrons), the window walk-out effect disappears completely resulting in a stable threshold voltage. Also retention after cycling remains identical to the retention of a fresh device.

These results open perspectives for both high cycle applications (1,000,000 cycles have been demonstrated without verify) as well as for high retention applications (such as stand-alone code storage and automotive microcontrollers). Additional benefits of the technique are the smaller periphery (because verify may be skipped and erase voltage is lower) and the sharper distributions, which allow for further channel length scaling.
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