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DANIELE CONTESTABLE-GILKES, SAILESH M. MERCHANT & MINSEOK OH, Agere Systems, Orlando, FL, USA

ABSTRACT

Increased device speed and improved electromigration are two main drivers for the semiconductor industry’s transition from aluminium to copper for integrated circuit interconnects. A major disadvantage of copper is its fast diffusion rate into underlying substrates. Therefore, in order to benefit from the advantages of lower sheet resistance and improved electromigration by using copper, a high-quality, high-performance diffusion barrier is also necessary. Various transition and refractory metals, their alloys, silicides and nitrides, such as Ta and TaNx, prevent copper from diffusing into adjacent dielectrics. The deposition of the thin barrier layer, or barrier bilayers, is followed by the PVD or CVD deposition of a copper seed layer, which is a prerequisite for the subsequent bulk copper deposition by electroplating. This introduces a new metal stack into an already complicated integration scheme. Copper integration, along with decreasing device sizes, and the transition to 300-mm size wafers, provokes the need for accurate and reliable thickness measurements of the constituent films to monitor and maintain strict process control. Thus, the thickness of the barrier and seed layers, as well as the bulk of the electroplated copper must be accurately monitored to ensure a quality manufacturable process. This article describes a comparative study of several techniques used to measure layer thickness.