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M. Yang, L. Shi, K,#. Chan, E. Gusev, K. Jenkins, J. Ott, K. Guarini, C. D'Emic, M. Cobb, P. Moone, K. Rim, K Chan, F. Cardone, L. Tai, S. Koester, D. Canaperi, B. To, E. Duch, I. Babich, R. Carruthers, P. Saunders, M. Steen, Y. Zhang, M. Leong, IBM Semiconductor R&D Canter, Research Division, USA and D. Boy, J. Ott, N. Klymko, G. Wlker, M. Ieong, V. Chan, A. Chou, Y. Ninomiya, D. Pendelton, Y. Surpris, D. Heenan, N. Rovedo & H. Ng, IBM Microelectronic Division, Hopwell Junction, USA. ABSTRACT
Methods to put strained silicon directly on an insulator layer and to produce CMOS structures with optimised silicon orientations are considered. Common to both enhancements is a technique to transfer layers using wafer bonding. Indications of progress in producing devices on these special substrates and transistor characteristics are given. Potential for future scaling of devices is also investigated.
21st Edition: SOI opens enhanced opportunities
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