Christophe Maleville, Christelle Michau, Daniel Delprat, Soitec SA, Crolles, France, & Arun Srivatsa, KLA-Tencor, San Jose, CA, USA

ABSTRACT

With shrinking device geometries, we are now witnessing an increased adoption of silicon-on-insulator (SOI) substrates in mainstream semiconductor fabrication (replacing bare silicon (Si) and epi substrates) to realize the advantages of SOI for improved device performance. The superficial Si thickness in SOI structures is also shrinking with each node as semiconductor manufacturers migrate from partially depleted SOI (PD-SOI) to fully depleted SOI (FD-SOI).