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Home arrow Lithography arrow Articles arrow Edition 26 arrow 26th Edition: Grand challenges of advanced resist technology
26th Edition: Grand challenges of advanced resist technology Print E-mail
Sep 20, 2005 at 12:20 AM

Jan Makos-Brotherton, Texas Instruments Assignee to SEMATECH, Will Conley, Freescale Semiconductor Assignee to SEMATECH, Kim Dean, SEMATECH, Jeff Meute IBM Assignee to SEMATECH, & Karen Turnquest, AMD Assignee to SEMATECH, Austin, TX, USA

ABSTRACT

As the semiconductor industry struggles to maintain the pace set by Moore's Law, the lithography research community must take on new challenges to ensure robust resist performance. Current research continues on parallel paths for extreme ultraviolet (EUV) and 193-nm immersion technologies, stretching available resources to solve critical issues in line-edge roughness (LER), sensitivity, resolution, etch resistance, and optics contamination. SEMATECH is making progress in solving key issues of cutting-edge technologies with the help and cooperation of suppliers, universities, national labs, and other consortia. 

26th Edition: Grand challenges of advanced resist technology


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