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ASMC '08 annotations: Survey of fabs' incoming reticle QC strategies reveals common ground |
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May 08, 2008 at 03:44 PM |
Can one ever do too much benchmarking, or does a small amount of manufacturing-practice polling go a long way? If you're in the midst of a hellish fab ramp, you'd have ample reason to be annoyed by a survey asking questions about why the ramp is so hellish.
But in many cases, the benchmark data derived reveals industry or factory trends that might otherwise escape notice and can provide the foundation for a way to change one's approach for the better--or offer evidence of a job well done.
A recent survey conducted by KLA-Tencor's reticle and photomask inspection division (RAPID) from the end of 2006 to the middle of 2007 attempted to get a handle on what fabs are doing when it comes to incoming reticle quality control and requalification. KLA-T's Russell Dover presented the results of the survey on the final day of the Advanced Semiconductor Manufacturing Conference (ASMC), held earlier this week in Cambridge, MA.
Personnel at some 30 fabs among 22 companies across all major chipmaking geographic regions were polled, broken down into 18 logic and 12 memory factories. The companies include most of the big dogs--Intel, Samsung, TSMC, Toshiba, IBM, Micron, STMicro--and 80% of the fabs surveyed run 300 mm and 100% feature some level of 193-nm ArF litho capability.
Dover said the focus of reticle inspection practices has changed from one of incoming quality control, or "sensitivity," to one of reticle requalification, where the emphasis is placed on early warning. Both approaches use direct inspection (for contamination and the like) or print-check/image quality techniques (to correlate which mask defects will end up on the wafer), or a combo of both.
Two-thirds of the both the logic and memory fabs' surveyed say they perform some sort of incoming quality control, although a smaller percentage (50% for memory, 23% for logic) focus on contamination-related IQC only. The fabs include 11 which use captive masks from their own companies' maskhouses and 19 which buy their masks from the vendor community. In a bit of a counterintuitive surprise, the results show some fabs that use vendors' masks have more trust in the incoming product than those who are supplied in an internal supply chain, in terms of whether pattern IQC tests are performed.
When it comes to how pervasive direct inspection or print-check reticle requalification practices are, the answer is very, as in 100%. As Dover said, "doing nothing is not an option." The majority perform either a direct approach or both the direct and print methods, with a small number--10%--only using print.
Crystal growth and haze contamination on the mask turn out to be the indisputable leader in the reasons for requalification. In another surprise, not one fab indicated that electrostatic discharge or particles triggered a requal, with Dover suggesting that ESD was "a thing of the past." This finding was disputed during the question-and-answer period by IBM's Chris Long, a static control expert, who cited recent studies showing a growing problem with what he called "nonclassical micro-ESD." In answer to another, somewhat related question about the reaction of the mask shops to the survey results, Dover noted that one can only send out the masks four or five times for cleaning, because the cleaning process introduces phase-shift-related defects.
When it comes to mask cleaning or return rates, the results revealed a wide range of practices, from zero to 11%, with the highest reported numbers from two fabs that use time-based cleans. Although every fab surveyed monitors its 193-nm reticles, the vast majority also monitor half or more of their 248-nm and i-Line materials.
Sample plan strategies run from simple (looking at mask feature size and a few other specs) to complex (factoring in a wide range of info, including number of die per mask, last inspection results, load ins to the scanner tools, etc.), with most of the logic and memory fabs polled opting for a simpler strategy, largely for operational reasons. Only 22% of the logic and 17% of the memory sites deploy the more involved methodologies, with similar percentages choosing a sampling approach somewhere between simple and complex.
In terms of how companies sampled across the various layers--critical, midcritical, and noncritical--their strategies show commonality across the logic and memory spectrum. Results indicate practices are driven both by the total exposures and the exposure wavelength, with more-critical layer reticles sampled more frequently and then relaxing in the midrange and really easing off in the noncritical layers. For example, on the logic side, which have the largest number of wafers between inspection (while memory post more when measured in time), the average number of wafers between samples for critical layers was 380, 760 for midcritical, and 1200 for noncritical layers. The survey also found no correlation between the size of the fab (in terms of wafers per month) and sampling inspection frequency.
Dover told me after the presentation that they may wait at least a year to perform another study, both because of the time and expense involved (known at Chip Shots as the "pain in the arse" effect) but also to allow a chance for a greater number of 65-nm and even 45-nm production sites to be included. Since the more advanced process generations feature more critical mask layers and the requalification strategies also require new metrology tools (such as, hmmm, the new KLA-T TeraFab system perhaps?), the model may have to be changed.
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Comment by GUEST on 2008-05-12 14:42:50
I agree with Chris Long's comments about reticle ESD not being a thing of the past. Certainly static control in fabs and during shipment of reticles has improved greatly, such that damage to reticles is now much rarer than it was ten years ago, but as Chris mentioned, the damage process has changed to a much more subtle phenomenon as feature sizes and spacings continue to shrink. Check out the Sematech website at http://www.sematech.org/meetings/archives/other/20031212/index.htm for more details, or see my article in Issue 25 of Future Fab which shows the latest experimental data on the reticle damage mechanism.
Gavin Rider. |
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