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Home arrow Blogs arrow Applied Materials focuses its litho-enhancement hopes on self-aligned double patterning
Applied Materials focuses its litho-enhancement hopes on self-aligned double patterning Print E-mail
Mar 03, 2008 at 08:45 AM
Applied Materials claims it has a great lithography-enabling technology with its self-aligned double patterning (SADP) approach. With its spacer structures and amorphous carbon patterning film, it looks like a clever, cost-effective non-litho-cell-based manufacturable solution for helping flash memory makers push to 3X-nm production (that's missing-digit speak for half pitches between 30 and 39.99 nm), once single-exposure immersion litho runs out of steam.

Samsung, Hynix, and other NANDufacturers have deployed or are considering deploying the etch/hardmask-centric DP enhancement for development of their next-gen gate stacks, bitlines, and shallow trench isolation layers. The ability to achieve stats like <3-nm overlays, <1.5 nm lines and <3.5 nm spaces (in terms of critical dimension uniformity), and <2 nm line-edge roughness (LER) certainly bodes well for SADP as an effective way to meet (or even exceed) the 30-something-nm patterning requirements.

During a SPIE Litho week breakfast for the press and analyst community, AMAT silicon systems group VP/CTO, Texas Instruments' refugee, and competitive ballroom dancer Hans Stork shared this encouraging news and also touted the tech's promise for logic and DRAM designs as well as its extendability to future design generations. He showed results of recent work done at the company's Maydan Technology Center with 22-nm (2X-nm?) hardmask patterns getting down to less than 1.5-nm line CDU and about 1.7 nm LER.

But Applied isn't developing advanced patterning films and SADP just for the sake of scientific progress or to be a good supplier to its flash customers: The company mavens (and pesky shareholders) want to make some decent coin from the technology---and they may be onto something big. The process represents that rare bird in the current semiconductor tool and process biz aviary---a focused sector with tremendous upside growth potential.

With the lithography segment projected to reach the $10-billion neighborhood and account for some 25% of the total wafer-fab equipment market by 2010 (and that doesn't include track tools, an area Applied plays in via the Sokudo venture), the equipment giant believes that the SADP served available market will experience a 105% compound annual growth rate between now and 2012---and that only accounts for what the company calculates the NAND band will adopt in (and hence purchase for) production.

Since the chart revealed to the increasingly caffeinated journos, researchers, and 'Street walkers was normalized, with no actual dollar figures shown on the y-axis, I buttonholed Ken MacWilliams, VP/GM at the Maydan center, after the presentation and asked him to guesstimate what kind of money the triple-digit CAGR number might represent. He told me it could reach 10% of that $10-billion litho figure; in other words, a cool billion samolians in a few years (assuming the dollar is still a hard currency by then).

Applied hasn't seen those kind of prodigious (albeit potential) growth numbers in its silicon systems domain for a very long time. In fact, you could say that they're downright photovoltaic.
Readers' comments
Comment by GUEST on 2008-03-05 09:22:04
Its a great success for applied materials.. 



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