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After years of development, Qimonda has released information regarding its ‘Deep-Trench’ process technology replacement - dubbed ‘Buried Wordline’ - that offers greater scaling capability through the 30nm node, as well as a host of process cost and die size savings that, it claims, are unprecedented. 

“This new technology has the potential to deliver improvements in our productivity and cost per bit that are unprecedented in our company’s history,” said Kin Wah Loh, President and CEO of Qimonda AG. “We are the first in the industry to unveil a DRAM technology roadmap down to the 30nm generation, enabling cell sizes as small as 4F². The introduction is the result of our continuous innovation as a leader in the development of memory products. This step also opens up further partnering opportunities.”

Qimonda plans to start production of a 65nm Buried Wordline DRAM device in the second half of 2008, as it ramps 58nm Deep-Trench to volume production, as previously stated.

The 46nm Buried Wordline DRAM technology is expected to ramp in the second half of 2009. This 46nm device is claimed to offer more than twice the bits per wafer over the company’s 58nm trench technology, as well as intrinsically lower bitline and wordline capacitance that enables low power consumption and significantly smaller die size than its competitors.

The simplified structure and process requirements are also expected to reduce manufacturing costs at the sub-60nm node and below while employing a mainstream stack capacitor.

The one-time process and tool cost transition has been put at approximately €100 million in total during financial years 2009 and 2010, the company said.