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Toshiba and SanDisk expect two-thirds of NAND flash production at 43nm by year-end |
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Feb 07, 2008 at 03:32 PM |
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 Toshiba and SanDisk said that they were now sampling 43nm multi-level cell (MLC) NAND flash devices and expect volume production to start in March 2008. The 16Gb devices have a chip area of 120 square millimeters, less than 30 percent area density of its 56nm-based devices.
“We’re excited about commencing the production ramp of the 43nm generation of MLC NAND flash memory with its significantly lower cost benefits,” said Dr. Randhir Thakur, SanDisk’s Executive Vice President of technology and worldwide operations. “Technology features include SanDisk’s patented All Bit line (ABL) architecture with efficient programming algorithms and 8-Kilobyte (KB) page size, providing high performance capabilities. State-of-the-art lithography, other process technology innovations and industry-first 64-NAND string architecture provide lower cost per megabyte and excellent performance. The 43nm technology generation will become our major focus during 2008 as we continue to provide leading-edge technology and cost benefits to our customers” he added.
The new chips will be produced at Fab 4, the world’s largest 300mm fab, located in Mie prefecture, Japan. In the second half of 2008, Fab 3 (300mm) is also expected to transition to 43nm.
In SanDisk’s fourth quarter conference call Sanjay Mehrotra, SanDisk President and Chief Operating Officer said that he expects two-thirds of production to have been migrated to the 43nm node, similar to the ramp profile seen with the 56nm node.
Having adopted immersion lithography for volume production at the 56nm node, SanDisk believes that it has an advantage with the migration to the 43nm node, something other competitors will only adopt this year and so could have yield problems with 4Xnm transition.
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